A Quad Linear 56Gbaud PAM4 Transimpedance Amplifier in 0.18μm SiGe BiCMOS Technology

被引：2
|
作者：
Wang, Hui [1 ,3 ]
Chen, Yingmei [1 ,2 ]
Gao, Yuan [1 ]
Li, Ning [1 ]
Zhang, Zhen [1 ]
Guo, Chao [1 ]
Li, Jiquan [1 ]
机构：
[1] Southeast Univ, Inst RF & OE ICs, Nanjing 210096, Jiangsu, Peoples R China
[2] Purple Mt Labs, Nanjing 211111, Jiangsu, Peoples R China
[3] Huaiyin Normal Univ, Jiangsu Key Lab Modern Measurement Technol & Inte, Huaian 223300, Peoples R China
来源：
32ND IEEE INTERNATIONAL SYSTEM ON CHIP CONFERENCE (IEEE SOCC 2019) | 2019年
基金：
中国国家自然科学基金;
关键词：
TIA; optical receiver; SiGe BiCMOS; PAM-4; 400GbE; TIA;
D O I：
10.1109/SOCC46988.2019.1570541947
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A low noise and high linearity 56Gbaud PAM4 transimpedance amplifier (TIA) is presented in this paper, and it meets the requirements of emerging 400G Ethernet standards. The inductive shunt feedback technique is used in input stage of TIA to meet the specifications of high bandwidth and low noise. A Continuous-time linear equalizer (CTLE) is cascaded after TIA to compensate loss of bandwidth which caused by Photo Diode (PD) parasitic capacitance. A variable gain amplifier (VGA) which provides 18-dB gain control range accommodates input currents up to 1 mApp with little group delay variation. The TIA is implemented in 0.18 mu m SiGe BiCMOS technology. Post simulation results show that TIA provides 74.4dB transimpedance gain while bandwidth is 30GHz and input referred noise current is 2.3uArms. The output buffer provides 600mV output swing, and power consumption of the whole four channels is 600mW.
引用
收藏
页码：165 / 170
页数：6
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