Recent advances in memory consistency models for hardware shared memory systems

The memory consistency model of a shared memory system determines the order iii which memory operations will appear to execute to thc programmer. The memory consistency model Soi it system typically involves a tradeoff between performance and programmability. This paper provides an overview of recent advances in hardware optimizations, complier optimizations and programming environments relevant to memory consistency models of hardware distributed shared memory systems. We discuss recent hardware and complier optimizations that exploit the observation that it is sufficient to only appear as if the ordering rules of the consistency model are obeyed. These optimizations substantially improve the performance of the strictest consistent model, making it more attractive for its programmability. Recent concurrent programming languages and environments. on the other hand, support more relaxed consistency models. We discuss several such environments, including POSIX threads, Java, and OpenMP.