A novel ZVS quasi-resonant DC-link PWM inverter with minimum voltage stress across the switches

被引:0
作者
Ba-Thunya, AS [1 ]
Pillai, SK [1 ]
Prasad, D [1 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Bombay 400076, Maharashtra, India
来源
PESC 98 RECORD - 29TH ANNUAL IEEE POWER ELECTRONICS SPECIALISTS CONFERENCE, VOLS 1 AND 2 | 1998年
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a new quasi resonant DC-link (QRDCL) PWM inverter with zero voltage switching (ZVS) capability. The proposed quasiresonant circuit creates zero voltage intervals in the DC-link to facilitate ZVS of the inverter switches under all operating conditions. This is achieved with the DC-link voltage being clamped at the source voltage V-s using minimum additional components. It requires only two additional switches compared to the conventional PWM converter. Moreover, the control circuit is not called upon to control the inductor current, as it is the case with other circuits of the same family. Hence, it doesn't require any current sensing device, thereby, making the control circuit simple and cheap. The operating principle of the circuit is explained and detailed analysis of each operating mode is given. A design criterion for achieving ZVS is obtained from the mathematical analysis. The feasibility of the proposed circuit operation has been verified by PSPICE simulation. The simulation results show full ZVS for both the proposed circuit and the PWM inverter.
引用
收藏
页码:409 / 415
页数:7
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