Common-Floating Gate Test Structure for Separation of Cycling-Induced Degradation Components in Split-Gate Flash Memory Cells

被引:0
作者
Do, Nhan [1 ]
Tkachev, Yuri [1 ]
机构
[1] Silicon Storage Technol Inc, San Jose, CA 95134 USA
来源
2014 IEEE INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS) | 2014年
关键词
Flash memory; floating gate; electron tunneling; electron trapping; program-erase cycling endurance; memory reliability; oxide degradation;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The program-erase cycling-induced degradation mechanisms in a split-gate SuperFlash (R) memory cell were analyzed using a test structure containing two cells with a common floating gate. This test structure allowed us to separate the degradation mechanisms taking place in the floating-gate oxide and tunnel oxide during cycling. It was demonstrated that the program-induced floating gate oxide degradation becomes less significant for the advanced SuperFlash technology, which uses lower programming voltage.
引用
收藏
页码:38 / 40
页数:3
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