Comparison of Junctionless and Conventional Trigate Transistors With Lg Down to 26 nm

被引:260
作者
Rios, R. [1 ]
Cappellani, A. [1 ]
Armstrong, M. [1 ]
Budrevich, A. [1 ]
Gomez, H. [1 ]
Pai, R. [1 ]
Rahhal-orabi, N. [1 ]
Kuhn, K. [1 ]
机构
[1] Intel Corp, Technol & Mfg Grp, Hillsboro, OR 97124 USA
关键词
Accumulation mode; inversion mode (IM); trigate;
D O I
10.1109/LED.2011.2158978
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Junctionless accumulation-mode (JAM) devices with channel lengths L-g down to 26 nm were fabricated on a trigate process and compared to conventional inversion-mode (IM) devices. This letter represents the first experimental comparison of short-channel JAM-to-IM devices at matched OFF-state leakage (I-off). The JAM devices show better channel mobility (when moderately doped) and lower gate capacitance than the IM control counterparts at matched I-off. However, the JAMdevices also show reduced gate control and degraded short-channel characteristics. The observed degraded behavior of JAM relative to IM is explained with the aid of device simulations and a simple analytic model of the channel charge.
引用
收藏
页码:1170 / 1172
页数:3
相关论文
共 5 条
  • [1] [Anonymous], 2010, P 34 EUR SOL STAT DE
  • [2] Colinge JP, 2010, NAT NANOTECHNOL, V5, P225, DOI [10.1038/nnano.2010.15, 10.1038/NNANO.2010.15]
  • [3] Kavalieros J., 2006, VLSI TECH DIGEST, P50, DOI [DOI 10.1109/VLSIT.2006.1705211, 10.1109/VLSIT.2006.1705211]
  • [4] Lee C.-W., 2010, P SSDM 10, P1044, DOI DOI 10.7567/SSDM.2010.C-9-5L
  • [5] Performance estimation of junctionless multigate transistors
    Lee, Chi-Woo
    Ferain, Isabelle
    Afzalian, Aryan
    Yan, Ran
    Akhavan, Nima Delidashti
    Razavi, Pedrarn
    Colinge, Jean-Pierre
    [J]. SOLID-STATE ELECTRONICS, 2010, 54 (02) : 97 - 103