Systolic modular exponentiation via montgomery algorithm

被引：17

作者：

Tiountchik, AA ^{[1
]}

机构：

[1] Acad Sci Belarus, Math Inst, Minsk 220072, BELARUS

来源：

ELECTRONICS LETTERS | 1998年 / 34卷 / 09期

关键词：

D O I：

10.1049/el:19980624

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Using graph models, a pure systolic pipeline for modular exponentiation (as a whole) is designed. The designed systolic array can be used to raise to any power via Montgomery multiplications and squarings; spatial requirements of the array do not depend on the power.

引用

页码：874 / 875

页数：2

共 7 条

[1]

DUSSE SR, 1991, LECT NOTES COMPUT SC, V473, P230

[2] HARDWARE IMPLEMENTATION OF MONTGOMERY MODULAR MULTIPLICATION ALGORITHM [J].