Study on the Mapping of Streaming Application on Many-Core Architecture

被引：0
|
作者：
Yu, Lei [1 ]
Liu, Zhiyong [1 ]
Fan, Dongrui [1 ]
Ma, Yike [1 ]
Song, Fenglong [1 ]
Ye, Xiaochun [1 ]
Xu, Weizhi [1 ]
机构：
[1] Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Syst & Architecture, Beijing 100864, Peoples R China
来源：
INFORMATION TECHNOLOGY FOR MANUFACTURING SYSTEMS II, PTS 1-3 | 2011年 / 58-60卷
关键词：
many-core; streaming application; parallelism; event-driven; speedup;
D O I：
10.4028/www.scientific.net/AMM.58-60.298
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Streaming program is an important application of large-scale parallel processing. The common parallel method for streaming program is not suitable for many-core architecture. For the streaming programs, this paper proposes a novel mapping method based on hardwire architecture. The method uses SPM (Scratch-Pad Memory) to transfer the data. Thus, the number of accessing shared Cache is reduced and the cost of communication is also reduced. The experimental results show the effectiveness of the method.
引用
收藏
页码：298 / 303
页数：6
相关论文
共 50 条
  • [21] SCC: A FLEXIBLE ARCHITECTURE FOR MANY-CORE PLATFORM RESEARCH
    Gries, Matthias
    Hoffmann, Ulrich
    Konow, Michael
    Riepen, Michael
    COMPUTING IN SCIENCE & ENGINEERING, 2011, 13 (06) : 79 - 83
  • [22] Modeling and Simulation of a Many-Core Architecture Using SystemC
    Silva, Ana Rita
    Jose, Wilson
    Neto, Horacio
    Vestias, Mario
    CONFERENCE ON ELECTRONICS, TELECOMMUNICATIONS AND COMPUTERS - CETC 2013, 2014, 17 : 146 - 153
  • [23] A Many-core Architecture for In-Memory Data Processing
    Agrawal, Sandeep R.
    Idicula, Sam
    Raghavan, Arun
    Vlachos, Evangelos
    Govindaraju, Venkatraman
    Varadarajan, Venkatanathan
    Balkesen, Cagri
    Giannikis, Georgios
    Roth, Charlie
    Agarwal, Nipun
    Sedlar, Eric
    50TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO), 2017, : 245 - 258
  • [24] Sparse Matrix Multiplication on a Reconfigurable Many-Core Architecture
    Pinhao, Joao
    Jose, Wilson
    Neto, Horacio
    Vestias, Mario
    2015 EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD), 2015, : 330 - 336
  • [25] A grouping mapping mechanism of threads on many-core systems
    Ju T.
    Zhang X.
    Chen H.
    Dong X.
    Dong, Xiaoshe, 1600, Xi'an Jiaotong University (50): : 57 - 63
  • [26] Optimized Dense Matrix Multiplication on a Many-Core Architecture
    Garcia, Elkin
    Venetis, Ioannis E.
    Khan, Rishi
    Gao, Guang R.
    EURO-PAR 2010 - PARALLEL PROCESSING, PART II, 2010, 6272 : 316 - +
  • [27] Task Mapping Techniques for Embedded Many-core SoCs
    Kaida, Junya
    Hieda, Takuji
    Taniguchi, Ittetsu
    Tomiyama, Hiroyuki
    Hara-Azumi, Yuko
    Inoue, Koji
    2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC), 2012, : 204 - 207
  • [28] Reconfigurable architecture for heterogeneous multi-core and many-core architecture with IoT assistance
    Xing X.
    Cao J.
    Zhou H.
    Song L.
    Qiu Y.
    International Journal of High Performance Systems Architecture, 2021, 10 (3-4) : 162 - 173
  • [29] Mapping Routing Lookup Algorithm on Many-Core Architecture based on SPM and Cache Mixed Method
    Yu, Lei
    Liu, Zhiyong
    Fan, Dongrui
    Ma, Yike
    Song, Fenglong
    Ye, Xiaochun
    Xu, Weizhi
    INFORMATION TECHNOLOGY FOR MANUFACTURING SYSTEMS II, PTS 1-3, 2011, 58-60 : 1226 - 1231
  • [30] Application Suitability Assessment for Many-Core Targets
    Newburn, Chris J.
    Sukha, Jim
    Sharapov, Ilya
    Nguyen, Anthony D.
    Miao, Chyi-Chang
    HIGH PERFORMANCE COMPUTING, ISC HIGH PERFORMANCE 2016 INTERNATIONAL WORKSHOPS, 2016, 9945 : 319 - 338
12345