A portable programming interface for performance evaluation on modern processors

被引:347
作者
Browne, S
Dongarra, J
Garner, N
Ho, G
Mucci, P
机构
[1] Univ Tennessee, Dept Comp Sci, Knoxville, TN 37996 USA
[2] Oak Ridge Natl Lab, Oak Ridge, TN USA
关键词
D O I
10.1177/109434200001400303
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The purpose of the PAPI project is to specify a standard application programming interface (API) for accessing hardware performance counters available on most modern microprocessors. These counters exist as a small set of registers that count events, which are occurrences of specific signals and states related to the processor's function. Monitoring these events facilitates correlation between the structure of source/object code and the efficiency of the mapping of that code to the underlying architecture. This correlation has a variety of uses in performance analysis, including hand tuning, compiler optimization, debugging, benchmarking, monitoring, and performance modeling. In addition, it is hoped that this information will prove useful in the development of new compilation technology as well as in steering architectural development toward alleviating commonly occurring bottlenecks in high performance computing.
引用
收藏
页码:189 / 204
页数:16
相关论文
共 9 条
  • [1] ANDERSSON S, 1998, POWER3 INTRO TUNING
  • [2] BERRENDORF R, PCL PERFORMANCE COUN
  • [3] BREHOB M, 1996, CPS9611 MICH SAT U D
  • [4] CORTESI D, 1998, 0073430002 SIL GRAPH
  • [5] De Rose L. A., 1999, Proceedings of the 1999 International Conference on Parallel Processing, P311, DOI 10.1109/ICPP.1999.797417
  • [6] DEROSE L, 1998, 10 INT C COMP PERF E
  • [7] Hennessy J. L, 2012, COMPUTER ARCHITECTUR
  • [8] JANSSEN CL, 1999, VISUAL PROFILER VERS
  • [9] SMOLDERS L, 1999, RS6000 IBM DIV