A 100-Gb/s PAM-4 Voltage-Mode Transmitter With High-Resolution Unsegmented Three-Tap FFE in 40-nm CMOS

被引：2
|
作者：
Chen, Yan-Ting [1 ]
Peng, Pen-Jui [2 ]
Lin, Hung-Wen [1 ]
机构：
[1] Yuan Ze Univ, Dept Elect Engn, Taoyuan 32003, Taiwan
[2] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 30013, Taiwan
来源：
IEEE SOLID-STATE CIRCUITS LETTERS | 2022年 / 5卷
关键词：
CMOS; feed-forward equalizer (FFE); four-level pulse amplitude modulation (PAM-4); transmitter (TX); voltage-mode driver;
D O I：
10.1109/LSSC.2022.3202338
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This letter presents a 100-Gb/s four-level pulse amplitude modulation (PAM-4) voltage-mode transmitter (TX) with a three-tap feed-forward equalizer (FFE). A new configuration, including FFE and output impedance (Z(out)) control loops, for implementing voltage-mode FFE is proposed to avoid the driver being segmented. The method can significantly decrease the layout complexity of a high-resolution voltage-mode FFE, improving the output bandwidth. The TX front end merges the 2:1 multiplexer into the driver and adopts a quarter-rate clocking scheme to save significant power. Designed and fabricated in 40-nm CMOS, the PAM-4 TX achieves a maximum data rate of 100 Gb/s with 2.39-pJ/b energy efficiency under a chip-on-board assembly with 5-dB Nyquist loss.
引用
收藏
页码：218 / 221
页数：4
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