A Multilevel Inverter Topology Using Diode Half-Bridge Circuit with Reduced Power Component

被引:8
|
作者
Sathik, Jagabar [1 ,2 ]
Aleem, Shady H. E. Abdel [3 ]
Alishah, Rasoul Shalchi [4 ]
Almakhles, Dhafer [1 ]
Bertilsson, Kent [4 ]
Bhaskar, Mahajan Sagar [1 ]
Savier, George Fernandez [2 ]
Dhandapani, Karthikeyan [2 ]
机构
[1] Prince Sultan Univ, Renewable Energy Lab, Riyadh 11586, Saudi Arabia
[2] SRM Inst Sci & Technol, Dept Elect & Elect Engn, Kattankulathur Campus, Kattankulathur 603203, India
[3] Sci Valley Acad, Valley Higher Inst Engn & Technol, Dept Elect Engn, Qalyubia 44971, Egypt
[4] Mid Sweden Univ, Dept Elect, Holmgatan 10, S-85170 Sundsvall, Sweden
关键词
multilevel inverter; diode half-bridge circuit; power devices; asymmetric inverter; symmetric inverter; VOLTAGE; CONVERTER; COMPENSATION; DESIGN; NUMBER;
D O I
10.3390/en14217249
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
This paper presents a new multilevel converter with a reduced number of power components for medium voltage applications. Both symmetric and asymmetric structures of the presented multilevel converter are proposed. The symmetric topology requires equal dc source values, whereas the asymmetric topology uses minimum switch count. However, both structures suffer from high blocking voltage across the switches. To reduce the blocking voltage on switches, an optimal topology is presented and analyzed for the selection of the minimum number of switches and dc sources, while maintaining a low blocking voltage across the switches. A comparative analysis with recently published topologies was performed. The simulation results, as well as the comparative analysis, validated the robustness and effectiveness of the proposed topology in terms of the reduced power loss, lowered number of components, and cost. Furthermore, in addition to the simulation results, the performance of the proposed topology was verified using experimental results of 9, 17, and 25 levels.
引用
收藏
页数:21
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