共 50 条
- [41] Area and power efficient DCT architecture for image compression EURASIP Journal on Advances in Signal Processing, 2014
- [42] Area-time efficient systolic architecture for the DCT ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 2005, 3740 : 787 - 794
- [44] An Area-Efficient Architecture for Stochastic LDPC Decoder 2015 IEEE INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING (DSP), 2015, : 244 - 247
- [46] Area-efficient architecture for Fast Fourier Transform IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, 46 (02): : 187 - 193
- [47] An Area-Efficient Euclid Architecture with Low Latency JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES, 2006, 1 (3-4): : 221 - 227
- [48] An Area-efficient Unified Transform Architecture for VVC 2022 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 22), 2022, : 2012 - 2016