An Efficient Area Manipulation Architecture for Frequency Domain Encoding Process

被引:0
|
作者
Ismail, Yasser [1 ]
Shaaban, Mohsen [1 ]
McNeely, Jason [1 ]
Elgamel, Mohamed [1 ]
Bayoumi, Magdy A. [1 ]
机构
[1] Univ Louisiana Lafayette, Ctr Adv Comp Studies, Lafayette, LA 70504 USA
关键词
MOTION ESTIMATION;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Frequency-Domain Motion Estimation (FD-ME) evolved as a technique that would greatly reduce ME computations and the whole encoding time. In Dynamic Padding FD-ME (DP-FD-ME), a dynamic padding threshold adaptively selects the proper search area size according to a pre-estimated set of motion vectors. The main drawback of DP is the mismatched transformed search area formed from different consecutive transformed blocks which would lead to inaccurate ME. In this paper, efficient area and high speed Manipulation Unit Engine (MUE) is proposed, a main module of DP-FD-ME system, to forge a matched transformed search area from successive transformed blocks. Implementation results nominate the proposed MUE architecture to those multimedia applications that favors reducing both area and power consumption. Simulation results project that MUE, when integrated in a whole FD-ME system, can perform ME for 60 fps of 4CIF video at 172 MHZ. For the best of our knowledge, it is the first attempt to address such architecture.
引用
收藏
页码:2638 / 2641
页数:4
相关论文
共 50 条
  • [31] ARCHITECTURE CONSIDERATIONS FOR FREQUENCY-DOMAIN ADAPTIVE EQUALIZERS
    READY, M
    GOLDBERG, SH
    GOOCH, R
    TWENTY-THIRD ASILOMAR CONFERENCE ON SIGNALS, SYSTEMS & COMPUTERS, VOLS 1 AND 2: CONFERENCE RECORD, 1989, : 687 - 691
  • [32] An efficient architecture for motion estimation and compensation in the transform domain
    Lee, J
    Vijaykrishnan, N
    Irwin, MJ
    Wolf, W
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 2006, 16 (02) : 191 - 201
  • [33] Optical CDMA based on frequency-domain encoding enhancement of frequency division multiplexing
    Kamakura, K
    Gamachi, Y
    Uehara, H
    Sasase, I
    1997 IEEE PACIFIC RIM CONFERENCE ON COMMUNICATIONS, COMPUTERS AND SIGNAL PROCESSING, VOLS 1 AND 2: PACRIM 10 YEARS - 1987-1997, 1997, : 611 - 614
  • [34] Efficient data allocation for frequency domain experiments
    Sanchez, SM
    Konana, P
    OPERATIONS RESEARCH LETTERS, 2000, 26 (02) : 81 - 89
  • [35] EFFICIENT DIGITAL BEAMFORMING IN THE FREQUENCY-DOMAIN
    MARANDA, B
    JOURNAL OF THE ACOUSTICAL SOCIETY OF AMERICA, 1989, 86 (05): : 1813 - 1819
  • [36] OSS Architecture for Flexible and Efficient Process Control
    Oishi, Haruo
    Nakatani, Tatsuya
    Tayama, Kenichi
    Ogasawara, Shiro
    Yamamura, Tetsuya
    2006 IEEE/IFIP NETWORK OPERATIONS AND MANAGEMENT SYMPOSIUM, VOLS 1 AND 2, 2006, : 658 - 670
  • [37] A Power and Area Efficient Architecture of Convolver Based on Ram
    Chen, Chen
    Chen, Yun
    Chen, Yuan
    Pan, An
    Zeng, Xiao-Yang
    2009 IEEE 8TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2009, : 835 - 838
  • [38] Novel Architecture for Area and Delay efficient Vedic Multiplier
    Goel, Aayush
    Gupta, Ankit
    Kumar, Maninder
    Pandey, Neeta
    2017 RECENT DEVELOPMENTS IN CONTROL, AUTOMATION AND POWER ENGINEERING (RDCAPE), 2017, : 45 - 48
  • [39] Area and Power Efficient Network on Chip Router Architecture
    Sahu, Sweta
    Kittur, Harish M.
    2013 IEEE CONFERENCE ON INFORMATION AND COMMUNICATION TECHNOLOGIES (ICT 2013), 2013, : 855 - 859
  • [40] Area and power efficient DCT architecture for image compression
    Dhandapani, Vaithiyanathan
    Ramachandran, Seshasayanan
    EURASIP JOURNAL ON ADVANCES IN SIGNAL PROCESSING, 2014, : 1 - 9