An efficient and low power impulsive noise suppressor architecture for OFDM system

Orthogonal frequency division multiplexing is wireless communication technology which is used for high reliable and high datarate communication. The conventional OFDM system is often affected by noise contents when the symbols are passed through frequency selective fading channel. This paper proposes low power impulsive noise suppressor architecture for detecting and suppressing the noise contents in the received OFDM symbols. This proposed impulsive noise suppression architecture consumes less hardware resources and consumes low power. The proposed system is designed using Verilog high definition language and synthesized in Xilinx Project Navigator 12.1i.