A variant of a radix-10 combinational multiplier

被引：15
作者：
Dadda, Luigi [1 ,2 ]
Nannarelli, Alberto [3 ]
机构：
[1] Politecn Milan, I-20133 Milan, Italy
[2] Univ Svizzera Italiana, AlarI, Lugano, Switzerland
[3] Tech Univ Denmark, Dept Informat & Math Modeling, Lyngby, Denmark
来源：
PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10 | 2008年
关键词：
D O I：
10.1109/ISCAS.2008.4542181
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
We consider the problem of adding the partial products in the combinational decimal multiplier presented by Lang and Nannarelli. In the original paper this addition is done with a tree of decimal carry-save adders. In this paper, we treat the problem using the multi-operand decimal addition previously published by Dadda, where the sum of each column of the partial product array is obtained first in binary form and then converted to decimal. The multiplication, using a 90 mn CMOS technology, in this modified scheme takes 2.51 ns, while in the original scheme it takes 2.65 ns. The area of the two schemes is roughly the same.
引用
收藏
页码：3370 / +
页数：2
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