A Novel Design Method for Resolver-to-Digital Conversion

被引:65
作者
Wang, Yijing [1 ]
Zhu, Zhiqi [1 ]
Zuo, Zhiqiang [1 ]
机构
[1] Tianjin Univ, Tianjin Key Lab Proc Measurement & Control, Sch Elect Engn & Automat, Tianjin 300072, Peoples R China
基金
中国国家自然科学基金;
关键词
Field-programmable gate array (FPGA); lookup table (LUT); resolver-to-digital conversion (RDC); DRIVES;
D O I
10.1109/TIE.2014.2375254
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
A simple and novel design method for resolver-to-digital conversion is presented. The proposed method takes advantage of the auxiliary sinusoidal signals generated by addition and subtraction operations of the demodulated signals of the resolver's outputs. A pseudolinear signal is obtained through appropriate mathematical manipulation between the auxiliary sinusoidal signals and the demodulated ones. A calibration strategy is then provided to achieve the highest possible precision. It is shown that the error between the calibrated angular and the true angular position is less than 0.00235 degrees over 0. similar to 360 degrees. The proposed method enables the determination of the angular position without utilizing a lookup table or additional reference signals. Furthermore, the presented strategy is implemented using a field-programmable gate array. Finally, our method is tested on a tracking radar antenna servo system where resolvers are installed on it. Several experiments under different conditions are performed to further verify the effectiveness of the proposed method.
引用
收藏
页码:3724 / 3731
页数:8
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