New inverter output filter topology for PWM motor drives

This paper presents a new inverter output filter topology for pulse width modulation (PWM) motor drives. It is shown that the proposed filter effectively reduces high frequency harmonics which can cause serious damage to the motor bearings and insulation. The proposed filter is comprised of a conventional resistance, inductance, capacitance (RLC) network cascaded with an LC trap filter. The LC trap, tuned to the inverter switching frequency, is very effective in reducing the switching harmonics. By using this new topology the need for high damping resistance and low RLC cut-off frequency is eliminated, This reduces the phase shift in the current regulation loop and increases the filter: efficiency. Experimental verification of the filter topology is provided with a 480 V inverter and a 25 hp permanent magnet synchronous motor. Space-vector predictive current regulation is implemented as an inner-loop current regulator for the outer-loop speed control using a digital signal processor. The effectiveness of the filter at different motor speeds is presented.