A low-power frequency synthesizer with quadrature signal generation for 2.4 GHz Zigbee transceiver applications

被引：11

作者：

Srinivasan, Rangakrishnan ^{[1
]}

Turker, Didem Zehha ^{[1
]}

Park, Sang Wook ^{[1
]}

Sanchez-Sinencio, Edgar ^{[1
]}

机构：

[1] Texas A&M Univ, Dept Elect Engn, College Stn, TX 77843 USA

来源：

2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年

关键词：

D O I：

10.1109/ISCAS.2007.378555

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

A frequency synthesizer for a 2.4 GHz IEEE 802.15.4/Zigbee compliant transceiver is presented. The VCO has a 15.2% tuning range from 4580-5275 MHz with 135 MHz/V sensitivity. IQ generation for transceiver applications is performed through frequency division at the output of VCO. Frequency dividers employ hybrid circuit styles including CML and TSPC logic. The synthesizer is implemented in TSMC 0.18 mu m CMOS technology. It occupies an area of 0.9 by 0.7 mm(2) only and consumes a total of 15mW from supply voltages of 3V, 1.8V and 1.3V.

引用

页码：429 / 432

页数：4

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