CMOS photodetectors/receivers for smart-pixel based photonic systems

The design, characterization and evaluation of CMOS based silicon photodetectors/photoreceivers suitable for smart-pixel based applications are presented. implemented with a conventional CMOS fabrication process, these photodetectors/receiver circuits can be reliably fabricated for smart-pixel based photonic information processing systems that combine the parallelism associated with optics and the data processing capabilities associated with CMOS logic. Several different CMOS based photodetector structures including p-n junction detectors and bipolar phototransistors are presented. Simulation results indicate that the p-n junction detectors will provide photocurrents in the range of nanoamps with rise/fall times on the order of picoseconds. Although slower response is expected with the phototransistor structure, the optoelectronic gain increases the photocurrent to the microamps range. In addition to fabrication and evaluation of individual photodetectors, we present the design and evaluation of high gain photoreceiver array. Based on a standard 1.2 mum CMOS fabrication process the monolithic photodetector/receiver circuit includes a bipolar phototransistor, a three-stage current amplifier and a differential amplifier that produces output at digital logic levels. The photoreceiver with high gain and adjustable threshold has a wide dynamic range. For a reference voltage of 3.2V, the optical power threshold has been measured at less than 1nW. A page-oriented optical data detection is demonstrated using a 5x5 smart-pixel photoreceiver array.