Characterization of Cdv/dt induced power loss in synchronous buck DC-DC converters

被引:0
作者
Zhao, Q [1 ]
Stojcic, G [1 ]
机构
[1] Int Rectifier, El Segundo, CA 90245 USA
来源
APEC 2004: NINETEENTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION, VOLS 1-3 | 2004年
关键词
synchronous rectifier; switching loss;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Good understanding of power loss in a high frequency synchronous buck converter is important for design optimization of both power MOSFET and circuit itself. Most of the MOSFET power losses are relatively easy to quantify. The exception is the power loss associated with Cdv/dt induced turn on of the low-side MOSFET (synchronous rectifier). This paper characterizes the Cdv/dt induced power loss in two ways. First, detailed device characterization, in-circuit testing, and modeling are used for a comparative loss calculation. This method requires specialized test equipment and is rather complicated and time consuming. A simple method is then introduced to very accurately quantify the Cdv/dt loss. With this method, the Cdv/dt induced power loss on synchronous buck converters at different operation conditions can be readily assessed. The impacts of Cdv/dt induced turn on different applications are addressed.
引用
收藏
页码:292 / 297
页数:6
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