A SoPC based Fixed Point System for Spaceborne SAR Real-Time Imaging Processing

With the development of satellite load technology and very large-scale integrated (VLSI) circuit technology, on-board real-time synthetic aperture radar (SAR) imaging systems have facilitated rapid response to disasters. The state-of-the-art System-on-Programmable-Chip (SoPC) technique, associated with embedded processor and other function modules, provides a potential solution to satisfy all constraints. However, with the improvement of processing efficiency and imagery granularity, to implement an entire SAR imaging processing using floating-point arithmetic is unaffordable. Data fixed-pointing is an effective solution, and the core issue is the finite word length optimization under the condition of trading-off hardware resource and processing precision. In this paper, we analyze the finite word length computing error for SAR imaging system using Chirp Scaling (CS) algorithm, and propose a mathematical computing error model. Then, the empirical formula of the system's output noise-to-signal ratio is derived. Guiding by the software simulation result, we implement and verify the proposed method into a Zynq+NetFPGA platform. The run-time results show that the proposed method can achieve a decent image quality assessed by Integrated Side Lobe Ratio (ISLR), Peak Side Lobe Ratio (PSLR) and Relative Mean Square Deviation (RMSD).