Potential design and transport property of 0.1-mu m MOSFET with asymmetric channel profile

被引:54
作者
Odanaka, S
Hiroki, A
机构
[1] Semiconductor Research Center, Matsushita Electric Industrial Co., Ltd.
关键词
D O I
10.1109/16.563364
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes potential design and transport property of a 0.1-mu m n-MOSFET with asymmetric channel profile, which is formed by the tilt-angle ion-implantation after gate electrode formation, The relation between device performance and transport property of the asymmetric 0.1-mu m device is explored by Monte Carlo simulations and measured electrical characteristics. The self-consistent Monte Carlo device simulation coupled with a process simulator reveals higher electron velocity at the source end of the channel and velocity overshoot at the source side of the channel, and the smaller high-energy tail of the distribution in the drain, This transport property creates high drain current, large transconductance, and low substrate current of the 0.1-mu m n-MOSFET with asymmetric channel profile.
引用
收藏
页码:595 / 600
页数:6
相关论文
共 19 条
[1]   AN INVESTIGATION OF STEADY-STATE VELOCITY OVERSHOOT IN SILICON [J].
BACCARANI, G ;
WORDEMAN, MR .
SOLID-STATE ELECTRONICS, 1985, 28 (04) :407-416
[2]   A NEW ASYMMETRICAL HALO SOURCE GOLD DRAIN (HS-GOLD) DEEP SUB-HALF-MICROMETER N-MOSFET DESIGN FOR RELIABILITY AND PERFORMANCE [J].
BUTI, TN ;
OGURA, S ;
ROVEDO, N ;
TOBIMATSU, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38 (08) :1757-1764
[3]   RELATIONSHIP BETWEEN MEASURED AND INTRINSIC TRANSCONDUCTANCES OF FETS [J].
CHOU, SY ;
ANTONIADIS, DA .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (02) :448-450
[4]   MONTE-CARLO SIMULATION OF TRANSPORT IN TECHNOLOGICALLY SIGNIFICANT SEMICONDUCTORS OF THE DIAMOND AND ZINCBLENDE STRUCTURES .2. SUBMICROMETER MOSFETS [J].
FISCHETTI, MV ;
LAUX, SE .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38 (03) :650-660
[5]  
Hiroki A, 1995, INTERNATIONAL ELECTRON DEVICES MEETING, 1995 - IEDM TECHNICAL DIGEST, P439, DOI 10.1109/IEDM.1995.499233
[6]  
Hiroki A., 1993, P VPAD, P18
[7]   GATE-VOLTAGE-DEPENDENT EFFECTIVE CHANNEL LENGTH AND SERIES RESISTANCE OF LDD MOSFETS [J].
HU, GJ ;
CHANG, C ;
CHIA, YT .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (12) :2469-2475
[8]   21-PS 0.1-MU-M CMOS DEVICES OPERATING AT ROOM-TEMPERATURE [J].
IZAWA, T ;
WATANABE, K ;
KAWAMURA, S .
IEEE ELECTRON DEVICE LETTERS, 1993, 14 (11) :533-535
[9]   MONTE-CARLO ANALYSIS OF SEMICONDUCTOR-DEVICES - THE DAMOCLES PROGRAM [J].
LAUX, SE ;
FISCHETTI, MV ;
FRANK, DJ .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1990, 34 (04) :466-494
[10]   MONTE-CARLO SIMULATION OF SUBMICROMETER SI N-MOSFETS AT 77-K AND 300-K [J].
LAUX, SE ;
FISCHETTI, MV .
IEEE ELECTRON DEVICE LETTERS, 1988, 9 (09) :467-469