A power management unit with continuous co-locking of clock frequency and supply voltage for dynamic voltage and frequency scaling

被引:6
作者
Lee, Jeabin [1 ]
Nam, Byeong-Gya [1 ]
Song, Seong-Jun [1 ]
Cho, Namjun [1 ]
Yoo, Hoi-Jun [1 ]
机构
[1] Adv Inst Sci & Technol KAIST, Dept EECS, Taejon 305701, South Korea
来源
2007 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11 | 2007年
关键词
D O I
10.1109/ISCAS.2007.378516
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
A power management unit (PMU) architecture is proposed for the domain-specific low power management with dynamic voltage and frequency scaling. The PMU continuously co-locks and dynamically varies the supply voltage and the clock frequency from 89 MHz to 200 MHz and from 1.0 V to 1.8 V, respectively, in less than 40 mu s. A 32bit RISC processor is used as power management target device. The PMU, 0.36mm(2) with 0.18-mu m CMOS process, consumes 5mW, and shows -100dBm/Hz phase noise of clock and 160mV load regulation of supply voltage with 100mA load current from the load, RISC processor.
引用
收藏
页码:2112 / 2115
页数:4
相关论文
共 10 条
  • [1] A dynamic voltage scaled microprocessor system
    Burd, TD
    Pering, TA
    Stratakos, AJ
    Brodersen, RW
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (11) : 1571 - 1580
  • [2] Ultra-dynamic voltage scaling (UDVS) using sub-threshold operation and local voltage dithering
    Calhoun, BH
    Chandrakasan, AP
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (01) : 238 - 245
  • [3] CHANDRAKASAN AP, 1992, IEEE J SOLID-ST CIRC, V27, P472
  • [4] Embedded 5 V to 3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology
    den Besten, GW
    Nauta, B
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (07) : 956 - 962
  • [5] Embedded power supply for low-power DSP
    Gutnik, V
    Chandrakasan, AP
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1997, 5 (04) : 425 - 435
  • [6] Area-efficient linear regulator with ultra-fast load regulation
    Hazucha, P
    Karnik, T
    Bloechel, BA
    Parsons, C
    Finan, D
    Borkar, S
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2005, 40 (04) : 933 - 940
  • [7] An efficient digital sliding controller for adaptive power-supply regulation
    Kim, J
    Horowitz, MA
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2002, 37 (05) : 639 - 647
  • [8] A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation
    Leung, KN
    Mok, PKT
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2003, 38 (10) : 1691 - 1702
  • [9] RICONMORA GA, 1988, IEEE J SOLID-ST CIRC, V33, P36
  • [10] A VOLTAGE REDUCTION TECHNIQUE FOR BATTERY-OPERATED SYSTEMS
    VONKAENEL, V
    MACKEN, P
    DEGRAUWE, MGR
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (05) : 1136 - 1140