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- [41] Statistical gate-delay modeling with intra-gate variability IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2003, E86A (12): : 2914 - 2922
- [42] Effect of Local Random Variation on Gate-Level Delay and Leakage Statistical Analysis 2009 1ST ASIA SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, 2009, : 255 - 258
- [43] Gate delay modeling with multiple input switching for static (statistical) timing analysis 19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2005, : 323 - 328
- [44] Methodology for the statistical evaluation of the effect of random telegraph noise (RTN) on RRAM characteristics 2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2012,
- [47] Back gate bias effect and layout dependence on Random Telegraph Noise in FDSOI technologies 2021 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2021,
- [49] New Analysis Methods for Comprehensive Understanding of Random Telegraph Noise 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, 2009, : 709 - +
- [50] Random Telegraph Noise Measurement and Analysis based on Arrayed Test Circuit toward High S/N CMOS Image Sensors 2016 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS), 2016, : 46 - 51