A Metric-Guided Method for Discovering Impactful Features and Architectural Insights for Skylake-Based Processors

被引：11
作者：
Yasin, Ahmad [1 ,2 ,6 ]
Haj-Yahya, Jawad [3 ,7 ]
Ben-Asher, Yosi [4 ]
Mendelson, Avi [5 ]
机构：
[1] Univ Haifa, Haifa, Israel
[2] Intel Corp, Santa Clara, CA 95051 USA
[3] Swiss Fed Inst Technol, Zurich, Switzerland
[4] Univ Haifa, Dept Comp Sci, IL-3498838 Haifa, Israel
[5] Technion, CS Dept, IL-320003 Haifa, Israel
[6] POB 1997, IL-1790700 Kafr Manda, Israel
[7] CAB F 72,Univ Str 6, CH-8092 Zurich, Switzerland
来源：
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION | 2019年 / 16卷 / 04期
关键词：
Performance analysis; performance comparison; benchmarking; microarchitecture; instruction set architecture; compiler code generation; PERFORMANCE; TOOLS;
D O I：
10.1145/3369383
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The slowdown in technology scaling puts architectural features at the forefront of the innovation in modern processors. This article presents a Metric-Guided Method (MGM) that extends Top-Down analysis with carefully selected, dynamically adapted metrics in a structured approach. Using MGM, we conduct two evaluations at the microarchitecture and the Instruction Set Architecture (ISA) levels. Our results show that simple optimizations, such as improved representation of CISC instructions, broadly improve performance, while changes in the Floating-Point execution units had mixed impact. Overall, we report 10 architectural insights at the microarchitecture, ISA, and compiler fronts while quantifying their impact on the SPEC CPU benchmarks.
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页数：25
相关论文
共 39 条
[1]   HPCTOOLKIT: tools for performance analysis of optimized parallel programs [J].
Adhianto, L. ;
Banerjee, S. ;
Fagan, M. ;
Krentel, M. ;
Marin, G. ;
Mellor-Crummey, J. ;
Tallent, N. R. .
CONCURRENCY AND COMPUTATION-PRACTICE & EXPERIENCE, 2010, 22 (06) :685-701
[2]   Memory Hierarchy for Web Search [J].
Ayers, Grant ;
Ahn, Jung Ho ;
Kozyrakis, Christos ;
Ranganathan, Parthasarathy .
2018 24TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA), 2018, :643-656
[3]  
Binkert Nathan, 2011, Computer Architecture News, V39, P1, DOI 10.1145/2024716.2024718
[4]  
Carlson T. E., 2011, SC 11, P1, DOI [DOI 10.1145/2063384.2063454, 10.1145/2063384.2063454]
[5]  
Carvalho A., 2010, NEW LINUX PERF TOOLS
[6]  
Charles J, 2009, I S WORKL CHAR PROC, P188, DOI 10.1109/IISWC.2009.5306782
[7]  
Chen XY, 2013, MATH COMPUT SCI, V7, P379, DOI 10.1007/s11786-013-0169-2
[8]  
Coarfa Cristian, 2007, 21st International Conference on Supercomputing. ICS 07, P13
[9]  
Czechowski K, 2014, CONF PROC INT SYMP C, P493, DOI 10.1109/ISCA.2014.6853219
[10]  
Doweck J., 2017, IEEE MICRO, V11
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