A Capacitor-less LDO with High PSR over a wide frequency range

被引：7
|
作者：
Sularea, Iulian [1 ]
Raducan, Cristian [1 ]
Neag, Marius [1 ]
机构：
[1] Tech Univ Cluj Napoca, Basis Elect Dept, Cluj Napoca, Romania
来源：
2021 INTERNATIONAL SEMICONDUCTOR CONFERENCE (CAS) | 2021年
关键词：
Capacitor-less LDO; high PSR LDO; PSR Enhancer; bandwidth extension;
D O I：
10.1109/CAS52836.2021.9604164
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a capacitor-less low dropout (LDO) voltage PMOS regulator with high power supply rejection (PSR). The proposed LDO combines into a single core two differential stages: a primary one - as error amplifier for the negative feedback loop - and a secondary one, used to create a feedforward cancellation path from the supply to the gate of the pass transistor. With this arrangement the LDO can provide a PSR of -43dB at 1MHz for the maximum load current of 50mA. This performance is achieved with only 20 mu A quiescent current and a load capacitor of 100pF. The LDO is designed in a 0.18 mu m standard CMOS process.
引用
收藏
页码：213 / 216
页数：4
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