A hardware/software co-design approach for face recognition

被引:0
作者
Li, XG [1 ]
Areibi, S [1 ]
机构
[1] Univ Guelph, Sch Engn, Guelph, ON N1G 2W1, Canada
来源
16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS | 2004年
关键词
ANN; face recognition; FPGA; H/S co-design;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Face recognition is a technique employed in large-scale citizen identification applications, surveillance applications, law enforcement applications such as booking stations, and kiosks. Artificial Neural Networks (ANNs) have been proved to be all effective way to solve this problem, but due to the long-time training process, this approach can Hot be implemented efficiently by software. Although, hardware implementations can speedup the training process, this may lead to an inflexible solution. To balance flexibility (i.e. software implementations) and performance (i.e. hardware implementations), an embedded computing system consisting of both a processor and dedicated hardware on a Field Programmable Gate Array (FPGA) chip is proposed to solve face recognition based on all ANN approach. Results obtained indicate that this system achieves almost twice the speedup over a pure software implementation.
引用
收藏
页码:55 / 58
页数:4
相关论文
共 50 条
[41]   FPGA Implementation of Blokus Duo Player using Hardware/Software Co-Design [J].
Kojima, Akira .
PROCEEDINGS OF THE 2014 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), 2014, :378-381
[42]   Hardware-Software Co-Design for On-Chip Learning in AI Systems [J].
Varshika, M. L. ;
Mishra, Abhishek Kumar ;
Kandasamy, Nagarajan ;
Das, Anup .
2023 28TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, ASP-DAC, 2023, :624-631
[43]   Hardware-Software Co-Design of an Image Feature Extraction and Matching Algorithm [J].
Chien, Chiang-Heng ;
Chien, Chiang-Ju ;
Hsu, Chen-Chien .
2019 2ND INTERNATIONAL CONFERENCE ON INTELLIGENT AUTONOMOUS SYSTEMS (ICOIAS 2019), 2019, :37-41
[44]   Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators [J].
Montanaro, Gabriele ;
Galimberti, Andrea ;
Colizzi, Ernesto ;
Zoni, Davide .
2022 29TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS (IEEE ICECS 2022), 2022,
[45]   Hardware-Software Co-Design: A Practical Course for Future Embedded Engineers [J].
Bartik, Matej ;
Pichlova, Dominika ;
Kubatova, Hana .
2016 5TH MEDITERRANEAN CONFERENCE ON EMBEDDED COMPUTING (MECO), 2016, :347-350
[46]   Hardware/Software Co-design of Power Level Difference Based Noise Cancellation [J].
Van Phu Ha ;
Duc Minh Nguyen ;
Quang Hieu Dang .
2015 INTERNATIONAL CONFERENCE ON ADVANCED TECHNOLOGIES FOR COMMUNICATIONS (ATC), 2015, :616-621
[47]   Hardware/software co-design of physical unclonable function based authentications on FPGAs [J].
Aysu, Aydin ;
Schaumont, Patrick .
MICROPROCESSORS AND MICROSYSTEMS, 2015, 39 (07) :589-597
[48]   Hardware/Software Co-Design of a Vision System for Automatic Classification of Date Fruits [J].
Khriji, Lazhar ;
Ammari, Ahmed Chiheb ;
Awadalla, Medhat .
INTERNATIONAL JOURNAL OF EMBEDDED AND REAL-TIME COMMUNICATION SYSTEMS (IJERTCS), 2020, 11 (04) :21-40
[49]   Hardware/Software Co-Design of Fractal Features Based Fall Detection System [J].
Tahir, Ahsen ;
Morison, Gordon ;
Skelton, Dawn A. ;
Gibson, Ryan M. .
SENSORS, 2020, 20 (08)
[50]   A Scalable Hardware/Software Co-design for Elliptic Curve Cryptography on PicoBlaze Microcontroller [J].
Hassan, Mohamed N. ;
Benaissa, Mohammed .
2010 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 2010, :2111-2114