A Compact, High-gain Q-Band Stacked Power Amplifier in 45nm SOI CMOS With 19.2dBm Psat and 19% PAE

被引：0

作者：

Tai, Wei ^{[1
]}

Ricketts, David S. ^{[2
]}

机构：

[1] Carnegie Mellon Univ, ECE Dept, Pittsburgh, PA 15213 USA

[2] North Carolina State Univ, ECE Dept, Raleigh, NC 27513 USA

来源：

2015 IEEE TOPICAL CONFERENCE ON POWER AMPLIFIERS FOR WIRELESS AND RADIO APPLICATIONS (PAWR) | 2015年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We present a compact, high-gain power amplifier (PA) that achieves high power and high output impedance through a 4-stacked architecture. By proper adjustment of device sizes and bias voltages, the optimum load impedance for maximum P-sat is moved close to 50Ohm which eliminates the need for an output matching network. The single-stage PA exhibits a high gain of 16 dB which is more than twice the gain of previously reported PAs and 19.2dBm P-sat and 19% PAE which are comparable to the state-of-the-art CMOS PAs at Q-band. The very compact area of 0.09 mm(2) and the high gain makes this design a suitable unit PA to be used for further parallel power combining to reach Watt levels of output power.

引用

页码：34 / 36

页数：3

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