Communication performance of a modular high-bandwidth multiprocessor system

被引：0

作者：

Pong, Fong ^{[1
]}

Tzeng, Nian-Feng ^{[2
]}

Oner, Koray ^{[1
]}

Ning, Chun ^{[1
]}

Chui, Kwong-Tak ^{[1
]}

Ekbote, Manoj ^{[1
]}

Lu, Yanping ^{[1
]}

机构：

[1] Broadcom Corp, 2451 Mission Coll Blvd, Santa Clara, CA 95054 USA

[2] Univ Louisiana Lafayette, Ctr Adv Comp Studies, Lafayette, LA 70504 USA

来源：

2007 INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS, VOLS 1 AND 2 | 2007年

关键词：

D O I：

暂无

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

This article deals with communication performance of a multiprocessor system implemented using award-wining BCM 1480 multi-core chips. Our system uses high-performance HyperTransport links to interconnect constituent chips, realizing cache-coherent non-uniform memory access. It takes advantage of hardware support from the BCM 1480 chip to attain very impressive communication performance among constituent BCM 1480 chips. This is achieved via an extension to global memory, so that small messages can be pushed quickly across chips in less than one us by the CPU cores through DMA to achieve zero-copy message buffering. It eliminates all overhead associated with the kernel and protocol processing for the utmost interconnect bandwidth in data transfers.

引用

页码：475 / +

页数：2

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