An SVM Approach for Five-Phase Current Source Converters Output Current Harmonics and Common-Mode Voltage Mitigation

被引:24
作者
He, Jinwei [1 ]
Lyu, Yuan [1 ]
Han, Junfei [2 ]
Wang, Chengshan [1 ]
机构
[1] Tianjin Univ, Tianjin 300072, Peoples R China
[2] Inner Mongolia Power Grp Corp, Hohhot 010000, Peoples R China
基金
中国国家自然科学基金;
关键词
Common-mode voltage (CMV); current source converters (CSCs); power quality; space vector modulation (SVM); CURRENT SOURCE INVERTERS; SPACE-VECTOR PWM; INDUCTION-MOTOR; LOSSES; REDUCTION; SYSTEM; SCHEME; DRIVE;
D O I
10.1109/TIE.2019.2934055
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, an enhanced five-segment space vector modulation (SVM) approach is proposed for a five-phase current source converter (CSC) to simultaneously reduce its output current harmonics and common-mode voltage (CMV). To realize proper output current harmonics mitigation, the reference current vector is synthesized by adjacent four large vectors and one zero vector in the fundamental plane. At the same time, the dwell times of four adjacent large vectors are calculated to actively control the corresponding current projection in the third sequence plane. In addition, the zero vector is selected according to the ranking of the instantaneous filter capacitor voltage absolute value to reduce the peak CMV. Comparing to voltage source converter (VSC) counterparts where the CMV is not affected by the ac output voltage and current harmonic components, it is interesting to find that the CMV enveloping of the CSC has a strong connection with its third harmonic output current. Then, a sequence arrangement for the five-segment SVM approach is proposed to ensure only one switch action during vector states transition. Finally, a transformerlike loss model is established to evaluate the loss performance of the CSC with a different modulation approach and a vector sequence selection method.
引用
收藏
页码:5232 / 5245
页数:14
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