Impact of SiO2/Si Interface Micro-roughness on SILC Distribution and Dielectric Breakdown: A Comparative Study with Atomically Flattened Devices

被引：0
作者：
Park, Hyeonwoo [1 ]
Goto, Tetsuya [2 ]
Kuroda, Rihito [1 ]
Teramoto, Akinobu [2 ]
Suwa, Tomoyuki [2 ]
Kimoto, Daiki [1 ]
Sugawa, Shigetoshi [1 ,2 ]
机构：
[1] Tohoku Univ, Grad Sch Engn, Sendai, Miyagi, Japan
[2] Tohoku Univ, New Ind Creat Hatchery Ctr, Sendai, Miyagi, Japan
来源：
2017 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS) | 2017年
关键词：
Dielectric breakdown; Semiconductor-insulator interface; Stress induced leakage current (SILC); Surface roughness; Tunnel oxide; DEPENDENCE; MOBILITY; MOSFETS; SILICON; SURFACE; FILMS;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Stress Induced Leakage Current (SILC) limits the scaling of tunnel oxide of flash memory, because it increases with the decrease of the tunnel oxide thickness. Especially, anomalously large SILC that appears on the local spots can cause bit errors. We measured QBD and SILC characteristics of the MOSFETs with the conventional and the atomically flattened SiO2/Si interfaces, and the impact of the micro-roughness on QBD and SILC has been investigated. It was found that both the numbers of the defects inducing QBD and anomalous SILC are reduced by introducing the atomically flat SiO2/Si interface. And the calculated excess electric field at a projecting part is approximately 5% larger than the atomically flat part by the SILC distribution and the electric field concentration simulation. It indicates that the SiO2/Si interface micro-roughness is one of the origins that induce both the anomalous SILC and early failure in dielectric breakdown, due to localized electric field concentration effect.
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页数：5
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