Multiplierless evolutionary filter design

被引:0
|
作者
Chatelain, Benoit [1 ]
Gagnon, Francois [1 ]
机构
[1] Ecole Technol Super, LACIME, Montreal, PQ, Canada
来源
ISSCS 2007: INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS, VOLS 1 AND 2 | 2007年
关键词
D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Evolutive algorithms have demonstrated their potential as optimizers in a wide variety of applications. Automated evolutionary design of analog filters, antennas, logical gates and micro-electro-mechanical systems (MEMS) has resulted in unexpected but efficient topologies and configurations. In this paper, we present an automated design procedure for digital filters based on the use of a genetic algorithm (GA) and high level primitives such as delays, bit shift operators and adders. Given the performance criteria, the proposed algorithm autonomously decides on the components use and circuit configuration. Compared to traditional infinite impulse response (IIR) and canonical signed digits (CSD)-IIR filters, synthesis results show that the evolutionary designed (ED) filter can attain a twofold increase in speed and requires less hardware resource.
引用
收藏
页码:177 / +
页数:2
相关论文
共 50 条
  • [41] Multiplierless multiband filter for fractional sample rate conversion
    Dolecek, G. Jovanovic
    Torres, F. J. Trejo
    2008 MOSHARAKA INTERNATIONAL CONFERENCE ON COMMUNICATIONS, PROPAGATION AND ELECTRONICS, 2008, : 56 - 61
  • [42] On the complexity of multiplierless direct and polyphase FIR filter structures
    Eghbali, Amir
    Gustafsson, Oscar
    Johansson, Hakan
    Lowenborg, Per
    PROCEEDINGS OF THE 5TH INTERNATIONAL SYMPOSIUM ON IMAGE AND SIGNAL PROCESSING AND ANALYSIS, 2007, : 200 - 205
  • [43] Hybrid multiplierless FIR filter architecture based on NEDA
    Tecpanecatl-Xihuitl, J. Luis
    Aguilar-Ponce, Ruth M.
    Bayoumi, Magdy
    VLSI-SOC 2007: PROCEEDINGS OF THE 2007 IFIP WG 10.5 INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION, 2007, : 316 - 319
  • [44] Approximate linear phase multiplierless IIR halfband filter
    Lutovac, MD
    Milic, LD
    IEEE SIGNAL PROCESSING LETTERS, 2000, 7 (03) : 52 - 53
  • [45] Multiplierless, reconfigurable folded architecture for VLSI wavelet filter
    Sung, Tze-Yun
    Hsin, Hsi-Chin
    Chang, Sheng-Dong
    WSEAS Transactions on Circuits and Systems, 2010, 9 (05): : 358 - 368
  • [46] Novel Multiplierless FPGA Implementation of CDMA Baseband Filter
    Troncoso Romero, David Ernesto
    Jovanovic Dolecek, Gordana
    2008 INTERNATIONAL SYMPOSIUM ON COMMUNICATIONS AND INFORMATION TECHNOLOGIES, 2008, : 289 - 294
  • [47] Multiplierless Design of Folded DSP Blocks
    Aksoy, Levent
    Flores, Paulo
    Monteiro, Jose
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2014, 20 (01) : 1 - 24
  • [48] Design of low power multiplierless FIR filter with enhanced adder efficiency using flower pollination optimization
    Kumar, A.
    Sharma, I
    Balyan, L. K.
    APPLIED ACOUSTICS, 2021, 174
  • [49] On the design and multiplierless realization of perfect reconstruction triplet-based FIR filter banks and wavelet bases
    Chan, SC
    Yeung, KS
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2004, 51 (08) : 1476 - 1491
  • [50] Design of multiplierless elliptic IIR filters
    Milic, LD
    Lutovac, MD
    1997 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, VOLS I - V: VOL I: PLENARY, EXPERT SUMMARIES, SPECIAL, AUDIO, UNDERWATER ACOUSTICS, VLSI; VOL II: SPEECH PROCESSING; VOL III: SPEECH PROCESSING, DIGITAL SIGNAL PROCESSING; VOL IV: MULTIDIMENSIONAL SIGNAL PROCESSING, NEURAL NETWORKS, 1997, : 2201 - 2204