A 2 V 2.4 GHz fully integrated CMOS LNA with Q-enhancement circuit for SOC design

A fully integrated 2V 2.4GHz CMOS low-noise amplifier (LNA) is presented in this paper. A negative resistance circuit is used to reduce the parasitic resistors of the on-chip spiral inductor and increase the quality factor (Q). An inductor is added to the common-source and common-gate transistors of the cascode circuit to improve matching and increase power gain. The LNA is designed according to the tsmc 1P4M 0.35mum process. The parasitic effect of the on-chip spiral inductor was considered. With a 2V supply, the power gain of the LNA is 19.5dB, the noise figure is 2.7dB, and the power dissipation is 15.2 mW. The input third-order intercept point (IIP3) is 0 dBm. The input -1 dB compression point (P-1dB) is - 13.9 dBm. The reverse isolation S12 is -44.1 dB.