High-Thermoresistant Temporary Bonding Technology for Multichip-to-Wafer 3-D Integration With Via-Last TSVs

被引:9
作者
Hashiguchi, Hideto [1 ]
Fukushima, Takafumi [2 ]
Murugesan, Mariappan [3 ]
Kino, Hisashi [4 ]
Tanaka, Tetsu [2 ,5 ]
Koyanagi, Mitsumasa [3 ]
机构
[1] Tohoku Univ, Dept Bioengn & Robot, Grad Sch Engn, Sendai, Miyagi 9808579, Japan
[2] Tohoku Univ, Dept Mech Syst Engn, Grad Sch Engn, Sendai, Miyagi 9808579, Japan
[3] Tohoku Univ, New Ind Creat Hatchery Ctr, Sendai, Miyagi 9808579, Japan
[4] Tohoku Univ, Frontier Res Inst Interdisciplinary Sci, Sendai, Miyagi 9808579, Japan
[5] Tohoku Univ, Grad Sch Biomed Engn, Dept Biomed Engn, Sendai, Miyagi 9808579, Japan
来源
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2019年 / 9卷 / 01期
关键词
3-D integration; multichip-to-wafer (MCtW) stacking; temporary bonding/debonding; thermally stable adhesive; via-last through-silicon via (TSV); 3-DIMENSIONAL INTEGRATION; SYSTEM INTEGRATION; SILICON;
D O I
10.1109/TCPMT.2018.2871764
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, a high-thermoresistant temporary bonding/debonding system using spin-on glass (SOG) and hydrogenated amorphous silicon layers is proposed for the multichip-to-wafer (MCtW) 3-D integration based on a via-last/backside-via through-silicon via (TSV) approach. The shear strengths of chips bonded to wafers through the SOG layers are evaluated. In addition, the debonding performance of the chips from the wafers is investigated by using the KrF excimer laser irradiation. Finally, a via-last/backside-via MCtW 3-D integration process using the temporary bonding/debonding system is demonstrated to show the high feasibility with the successful interconnect formation of a Cu-TSVs daisy chain (10 mu m in diameter and 50 mu m in depth) with a SiO2 liner dielectric deposited by O-3-tetraethylorthosilicate chemical vapor deposition at 350 degrees C.
引用
收藏
页码:181 / 188
页数:8
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