Evaluation of a Connectionless Technique for System-on-Chip Interconnection

被引:3
作者
Berejuck, Marcelo Daniel [1 ]
Frohlich, Antonio A. [2 ]
机构
[1] Univ Fed Santa Catarina, Dept Comp Engn, Jardim Ave, BR-88906072 Ararangua, SC, Brazil
[2] Univ Fed Santa Catarina, Software & Hardware Integrat Lab, POB 476, BR-88040900 Florianopolis, SC, Brazil
关键词
Network-on-chip; system-on-chip; real time; AETHEREAL NETWORK; IMPLEMENTATION;
D O I
10.1142/S0218126616300051
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present the design and evaluation of a high-performance network-on-chip (NoC) focused on telecommunication and multimedia applications that tolerate latency and bandwidth variations. The design is based on a connectionless strategy in which flits from different communication flows are interleaved in the same communication channel. Each flit carries routing information that is used by routers to perform arbitration and scheduling of the corresponding output ports in order to balance channel utilization. In order to compare our approach with others, we introduce an analytic model for the worst-case latency (WCL) of our NoC and recall those of related approaches. Analytic comparisons and experimental data show that our approach keeps average WCL lower for variable-bit-rate multimedia applications than a network based on resource reservation. For these applications, the overall throughput is larger than that of networks that perform resource reservation. A case study based on the proposed NoC shows that the average latency was 28% lower than the WCL expected for the experiment. Indeed, hard real-time flows designed considering the absolute WCL of the network will always meet the requirements of the associated hard real-time tasks, so no deadline can be lost due to network contention.
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页数:26
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