High-Linearity Self-Biased CMOS Current Buffer

被引：1

作者：

Alejandro Martinez-Nieto, Javier ^{[1
]}

Teresa Sanz-Pascual, Maria ^{[1
]}

Medrano-Marques, Nicolas ^{[2
]}

Calvo-Lopez, Belen ^{[2
]}

Sarmiento-Reyes, Arturo ^{[1
]}

机构：

[1] Natl Inst Astrophys Opt & Elect INAOE, Dept Elect, Puebla 72840, Mexico

[2] Univ Zaragoza, Grp Elect Design GDE, E-50009 Zaragoza, Spain

来源：

ELECTRONICS | 2018年 / 7卷 / 12期

关键词：

class AB operation; CMOS; current mirror; current buffer; quasi floating gate; low power; AB CURRENT MIRRORS; POWER; OTA; AMPLIFIER;

D O I：

10.3390/electronics7120423

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the input-output current ratio and total harmonic distortion (THD) figures lower than -60 dB at 30 mu A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications.

引用

页数：18

共 50 条

[41] Performance of High-Reliability and High-Linearity InGaP/GaAs HBT PAs for Wireless Communication [J].

Tu, Min-Chang ;

Ueng, Herng-Yih ;

Wang, Yu-Chi .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (01) :188-194

[42] A Novel Self-Biased Low Noise Amplifier with Current-Reused Technique for X Band Applications [J].

Yang, Chin-Lung ;

Hsieh, Tsung-Han ;

Chiang, Yi-Chyun .

APMC: 2009 ASIA PACIFIC MICROWAVE CONFERENCE, VOLS 1-5, 2009, :1667-1670

[43] A 2.5 GHz Radiation Hard Fully Self-biased PLL using 0.25 μm SOS-CMOS technology [J].

Ghosh, Partha Pratim ;

Xiao, E. .

2009 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2009, :121-124

[44] A low-voltage high-linearity UWB down-conversion mixer in 0.18-μm CMOS technology [J].

Yargholi, Mostafa ;

Darvishi, Farshad .

2014 22nd Iranian Conference on Electrical Engineering (ICEE), 2014, :355-360

[45] Ka-Band High-Linearity Attenuator with PVT Fluctuation Calibration for Temperature Compensation in 65-nm CMOS [J].

Sun, Jianpeng ;

Liu, Zhiqing ;

Hua, Jinyi ;

Zhao, Minghua .

2024 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY, RFIT, 2024,

[46] SELF-BIASED INDUCTORLESS WIDEBAND LNA WITH INTERLEAVING FEEDBACK NETWORK [J].

Lai, Mu-Tsung ;

Tsao, Hen-Wai .

MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, 2014, 56 (12) :2755-2758

[47] High-Linearity Drive Amplifier Using Active Local Feedback [J].

Park, Jun-Young ;

Lee, Ji-Young ;

Yun, Tae-Yeoul .

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, 2016, 26 (08) :613-615

[48] A High-linearity CMOS Analog Baseband Circuit with reconfigurable Gain and Bandwidth for 76-81GHz Automotive Radar [J].

Wu, Bowen ;

Duan, Zongming ;

Pan, Dongfang ;

Wang, Yan ;

Zhou, Yang .

2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2018, :1005-1007

[49] A 2.5 GHz radiation hard fully self-biased PLL using 0.25 μm SOS-CMOS technology [J].

Ghosh, Partha Pratim ;

Xiao, . E. .

2007 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS, 2007, :226-+

[50] A High-linearity Input-Buffer with high output common-mode stability for 10bit 3.2GSs ADC [J].

Sun, Ting ;

Li, Jing ;

Ning, Ning ;

Wu, Kejun ;

Yu, Qi .

ELECTRONICS LETTERS, 2020, 56 (13) :653-655

← 1 2 3 4 5 →