High-Linearity Self-Biased CMOS Current Buffer

被引：1

作者：

Alejandro Martinez-Nieto, Javier ^{[1
]}

Teresa Sanz-Pascual, Maria ^{[1
]}

Medrano-Marques, Nicolas ^{[2
]}

Calvo-Lopez, Belen ^{[2
]}

Sarmiento-Reyes, Arturo ^{[1
]}

机构：

[1] Natl Inst Astrophys Opt & Elect INAOE, Dept Elect, Puebla 72840, Mexico

[2] Univ Zaragoza, Grp Elect Design GDE, E-50009 Zaragoza, Spain

来源：

ELECTRONICS | 2018年 / 7卷 / 12期

关键词：

class AB operation; CMOS; current mirror; current buffer; quasi floating gate; low power; AB CURRENT MIRRORS; POWER; OTA; AMPLIFIER;

D O I：

10.3390/electronics7120423

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the input-output current ratio and total harmonic distortion (THD) figures lower than -60 dB at 30 mu A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications.

引用

页数：18

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