FPGA-based adaptive tracking estimation computer

被引：3

作者：

Salcic, Z ^{[1
]}

Lee, CR ^{[1
]}

机构：

[1] Univ Auckland, Dept Elect & Elect Engn, Auckland 1, New Zealand

来源：

IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS | 2001年 / 37卷 / 02期

关键词：

D O I：

10.1109/7.937481

中图分类号：

V [航空、航天];

学科分类号：

08 ; 0825 ;

摘要：

We describe an FPGA-based adaptive tracking estimation computer (FATEC) for a multiple target tracking (MTT) radar system. Its design Is centered around a small processor core customized according to the requirements of tracking application, to run the main control program and provide software flexibility, with a number of tracking algorithms (models) implemented in hardware-type functional units, in order to meet the timing requirements of the application. The FATEC approach provides combination of software flexibility, hardware efficiency, and functional adaptivity of implementation of application-specific computers for the other applications of a similar type, enabling various partitioning options between the software and the hardware parts of the solution.

引用

页码：699 / 706

页数：8

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