Verilog-A Compact Modeling and Simulation of AWGR based All-to-All Optical Interconnects

被引：0

作者：

Zhang, Kaiqi ^{[1
]}

Xiao, Xian ^{[1
]}

Zhang, Yu ^{[1
]}

Ben Yoo, S. J. ^{[1
]}

机构：

[1] Univ Calif Davis, Dept Elect & Comp Engn, One Shields Ave, Davis, CA 95616 USA

来源：

2018 CONFERENCE ON LASERS AND ELECTRO-OPTICS (CLEO) | 2018年

基金：

美国国家科学基金会;

关键词：

SWITCH;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We construct a Verilog-A compact module for all-to-all optically interconnected system. A physics-based model of a cyclic AWGR generate simulation results, which are compared to the measured data of an actual AWGR.

引用

页数：2

共 50 条

[1] AWGR-based All-to-all Optical Interconnects using Limited Number of Wavelengths
Yin, Yawei
Proietti, Roberto
Nitta, Christopher J.
Akella, Venkatesh
Mineo, Christopher
Yoo, S. J. B.
2013 IEEE OPTICAL INTERCONNECTS CONFERENCE, 2013, : 47 - +
[2] Bit-Parallel All-to-All and Flexible AWGR-based Optical Interconnects
Grani, Paolo
Liu, Gengchen
Proietti, Roberto
Ben Yoo, S. J.
2017 OPTICAL FIBER COMMUNICATIONS CONFERENCE AND EXHIBITION (OFC), 2017,
[3] Scalable AWGR-Based All-to-All Optical Interconnects with 2.5D/3D Integrated Optical Interposers
Xiao, Xian
Zhang, Yu
Proietti, Roberto
Yoo, S. J. B.
2018 IEEE PHOTONICS SOCIETY SUMMER TOPICAL MEETING SERIES (SUM), 2018, : 161 - 162
[4] Scalability of Microring-Based Crossbar for All-to-All Optical Interconnects
Xiao, Xian
Proietti, Roberto
Ben Yoo, S. J.
6TH IEEE PHOTONICS SOCIETY OPTICAL INTERCONNECTS CONFERENCE (OIPTICAL INTERCONNECTS 2017), 2017, : 39 - 40
[5] All-Optical Physical Layer NACK in AWGR-Based Optical Interconnects
Proietti, Roberto
Yin, Yawei
Yu, Runxiang
Ye, Xiaohui
Nitta, Christopher
Akella, Venkatesh
Ben Yoo, S. J.
IEEE PHOTONICS TECHNOLOGY LETTERS, 2012, 24 (05) : 410 - 412
[6] Best Practices for Compact Modeling in Verilog-A
McAndrew, Colin C.
Coram, Geoffrey J.
Gullapalli, Kiran K.
Jones, J. Robert
Nagel, Laurence W.
Roy, Ananda S.
Roychowdhury, Jaijeet
Scholten, Andries J.
Smit, Geert D. J.
Wang, Xufeng
Yoshitomi, Sadayuki
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2015, 3 (05): : 383 - 396
[7] Simulation of RRAM memory circuits, a Verilog-A compact modeling approach
Gonzalez-Cordero, G.
Roldan, J. B.
Jimenez-Molinos, F.
2016 CONFERENCE ON DESIGN OF CIRCUITS AND INTEGRATED SYSTEMS (DCIS 2016), 2016, : 243 - 248
[8] All-Optical Token Technique for Contention Resolution in AWGR-based Optical Interconnects
Proietti, Roberto
Yu, Runxiang
Yin, Yawei
Nitta, Christopher
Yao, Yuhan
Akella, Venkatesh
Yoo, S. J. B.
2012 CONFERENCE ON LASERS AND ELECTRO-OPTICS (CLEO), 2012,
[9] Experimental Demonstration of Flex-LIONS for Reconfigurable All-to-All Optical Interconnects
Xiao, Xian
Proietti, Roberto
Zhang, Kaiqi
Ben Yoo, S. J.
2018 EUROPEAN CONFERENCE ON OPTICAL COMMUNICATION (ECOC), 2018,
[10] Modeling simulation of noise in closed-loop all-digital PLLs using Verilog-A
Fergusson, W. Walter
Patel, Rakesh H.
Bereza, William
PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2007, : 857 - +

← 1 2 3 4 5 →