An FPGA Implementation of Convolutional Spiking Neural Networks for Radioisotope Identification

被引：5

作者：

Huang, Xiaoyu ^{[1
]}

Jones, Edward ^{[2
]}

Zhang, Siru ^{[3
]}

Xie, Shouyu ^{[1
]}

Furber, Steve ^{[2
]}

Goulermas, Yannis ^{[3
]}

Marsden, Edward ^{[4
]}

Baistow, Ian ^{[4
]}

Mitra, Srinjoy ^{[1
]}

Hamilton, Alister ^{[1
]}

机构：

[1] Univ Edinburgh, Edinburgh, Midlothian, Scotland

[2] Univ Manchester, Manchester, Lancs, England

[3] Univ Liverpool, Liverpool, Merseyside, England

[4] Kromek Grp Plc, Durham, England

来源：

2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2021年

关键词：

event-based signal processing; low power; radioisotope identification; convolutional spiking neural networks; FPGA; SpiNNaker;

D O I：

10.1109/ISCAS51556.2021.9401412

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper details FPGA implementation methodology for Convolutional Spiking Neural Networks (CSNN) and applies this methodology to low-power radioisotope identification using high resolution data. A power consumption of 75 mW has been achieved on an FPGA implementation of a CSNN, with the inference accuracy of 90.62% on a synthetic dataset. The chip validation method is presented. Prototyping was accelerated by evaluating SNN parameters using SpiNNaker neuromorphic platform.

引用

页数：5

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