Shifting the Network-on-Chip Paradigm Towards a Software Defined Network Architecture
被引:14
作者:
Sandoval-Arechiga, R.
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h-index: 0
机构:
CINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, MexicoCINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
Sandoval-Arechiga, R.
[1
]
Vazquez-Avila, J. L.
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h-index: 0
机构:
CINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, MexicoCINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
Vazquez-Avila, J. L.
[1
]
Parra-Michel, R.
论文数: 0引用数: 0
h-index: 0
机构:
CINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, MexicoCINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
Parra-Michel, R.
[1
]
Flores-Troncoso, J.
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h-index: 0
机构:
Univ Autonoma Zacatecas, CIDTE AEM UAZ, Zacatecas, Zac, MexicoCINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
Flores-Troncoso, J.
[2
]
Ibarra-Delgado, S.
论文数: 0引用数: 0
h-index: 0
机构:
Univ Autonoma Zacatecas, CIDTE AEM UAZ, Zacatecas, Zac, MexicoCINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
Ibarra-Delgado, S.
[2
]
机构:
[1] CINVESTAV IPN, Guadalajara Unit, Zapopan, Jalisco, Mexico
[2] Univ Autonoma Zacatecas, CIDTE AEM UAZ, Zacatecas, Zac, Mexico
来源:
2015 INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND COMPUTATIONAL INTELLIGENCE (CSCI)
|
2015年
关键词:
Networks-on-Chip;
Software Defined Networks;
Architecture;
Many-Core;
D O I:
10.1109/CSCI.2015.45
中图分类号:
TP [自动化技术、计算机技术];
学科分类号:
0812 ;
摘要:
In the Many-Core era, parallel processing performance is generally limited by the communications infrastructure's adaptability to the applications data dependencies. By means of a management framework, Software Defined Network (SDN) architectures offer such adaptability for conventional computer networks. However, Networks-on-Chip (NoC) management subsystems have been implemented as specific solutions unable to be reused in further designs. In this paper we applied SDN principles to propose a Software Defined NoC (SDNoC) architecture. This architecture is focused in abstraction layers and interfaces that permit its deployment in a modular fashion. Our proposal will orchestrate the complex multi-objective optimization to adjust on-chip networking to the applications requirements and data dependencies. This architecture allows the addition of other optimization engines without changing the software or hardware contained in underlying planes, then, Non Recurring Engineering costs can be diminished Index Terms Networks-on-Chip, Software Defined Networks, Architecture, Many-Core.