SystemC co-simulation for core-based embedded systems

被引:5
|
作者
Fummi, Franco [1 ]
Loghi, Mirko
Perbellini, Giovanni
Poncino, Massimo
机构
[1] Univ Verona, Dipartimento Informat, I-37134 Verona, Italy
[2] Politecn Torino, DAUIN, I-10129 Turin, Italy
关键词
co-simulation; embedded system; rapid prototyping;
D O I
10.1007/s10617-007-9006-7
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
SystemC is becoming the reference language for hardware description in EDA community. It is suitable for describing hardware at several abstraction levels, and it can be used to develop devices for programmable, CPU-based, systems. In such a context, there are several requirements to meet. The hardware under development can be an extension module for an existing system, possibly with no knowledge on the actual system implementation. At the same time, the module to develop can be minded as a CPU-independent device that should be evaluated against different processors. Hence, the developer should leverage different techniques, depending on the development environment involved. We present a framework that allows to co-simulate the hardware under development and the software, in a system extending context as well as in a CPU-centered design. Such a framework can use different abstraction levels for the hardware, thus allowing to meet the best accuracy/performance tradeoffs. Moreover, when required, the CPU can be replaced on the fly, keeping the software portion just marginally changed (or not modified at all), then realizing the required modularity of the design.
引用
收藏
页码:141 / 166
页数:26
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