共 50 条
- [1] Effect of annealing after copper plating on the pumping behavior of through silicon vias 2014 15TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY (ICEPT), 2014, : 101 - 104
- [2] Thermal Annealing Effects on Copper Microstructure in Through-Silicon-Vias 2016 15TH IEEE INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS (ITHERM), 2016, : 91 - 95
- [8] RELIABLE DESIGN OF ELECTROPLATED COPPER THROUGH SILICON VIAS PROCEEDINGS OF THE ASME INTERNATIONAL MECHANICAL ENGINEERING CONGRESS AND EXPOSITION 2010, VOL 4, 2012, : 509 - +
- [9] Copper Pumping of Through Silicon Vias in Reliability Test 2015 16TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, 2015,
- [10] Constitutive modelling of copper films on silicon substrate 2015 16TH INTERNATIONAL CONFERENCE ON THERMAL, MECHANICAL AND MULTI-PHYSICS SIMULATION AND EXPERIMENTS IN MICROELECTRONICS AND MICROSYSTEMS (EUROSIME), 2015,