A delay line based CMOS time digitizer IC with 13 ps single-shot precision

被引:13
作者
Jansson, J [1 ]
Mäntyniemi, A [1 ]
Kostamovaara, J [1 ]
机构
[1] Univ Oulu, Dept Elect & Informat Engn, Oulu, Finland
来源
2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS | 2005年
关键词
D O I
10.1109/ISCAS.2005.1465574
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper introduces an integrated digital CMOS time-to-digital converter which measures time periods with picosecond-level resolution. The circuit was fabricated in a 0.35 pm standard digital CMOS process. 13 ps rms single-shot precision was achieved by using a counter and a two-level nested DLL interpolation. Interpolators, which divide the cycle time of the 145 MHz reference clock to 512 pieces, provided 13.5 ps LSB width. The temperature drift was below 0.05 ps/degrees C. The power consumption with a 3.3 V operating voltage was 55 mW.
引用
收藏
页码:4269 / 4272
页数:4
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