Microscopic models of ATM multiplexing

This paper revisits the classical model of ATM multiplexing. We exhibit an ''exact'' discrete-time model for the output queue of the switch, taking into account all peculiarities of the hardware functions, especially all synchronization-related features. The model however happens to present a complexity proportional to both the queue size and the number of inputs. A batch arrival model can be built, where the dependency on the number of inputs disappears, and which we show to be equivalent to the previous one. The models are compared, in terms of cell loss probability and delay distribution. Moreover, we address the issue of fairness, closely related with the synchronous nature of ATM multiplexes.