A Manufacturable Dual Channel (Si and SiGe) High-K Metal Gate CMOS Technology with Multiple Oxides for High Performance and Low Power Applications

被引：0

作者：

Krishnan, S. ^{[1
]}

Kwon, U. ^{[1
]}

Moumen, N. ^{[1
]}

Stoker, M. W. ^{[1
]}

Harley, E. C. T. ^{[1
]}

Bedell, S. ^{[1
]}

Nair, D. ^{[1
]}

Greene, B. ^{[1
]}

Henson, W. ^{[1
]}

Chowdhury, M. ^{[1
]}

Prakash, D. P. ^{[1
]}

Wu, E. ^{[1
]}

Ioannou, D. ^{[1
]}

Cartier, E. ^{[1
]}

Na, M. -H. ^{[1
]}

Inumiya, S. ^{[2
]}

Mcstay, K. ^{[1
]}

Edge, L. ^{[1
]}

Iijima, R. ^{[2
]}

Cai, J. ^{[1
]}

Frank, M. ^{[1
]}

Hargrove, M. ^{[3
]}

Guo, D. ^{[1
]}

Kerber, A. ^{[3
]}

Jagannathan, H. ^{[1
]}

Ando, T. ^{[1
]}

Shepard, J. ^{[1
]}

Siddiqui, S. ^{[1
]}

Dai, M. ^{[1
]}

Bu, H. ^{[1
]}

Schaeffer, J. ^{[3
]}

Jaeger, D. ^{[1
]}

Barla, K. ^{[4
]}

Wallner, T. ^{[1
]}

Uchimura, S. ^{[2
]}

Lee, Y. ^{[3
]}

Karve, G. ^{[1
]}

Zafar, S. ^{[1
]}

Schepis, D. ^{[1
]}

Wang, Y. ^{[1
]}

Donaton, R. ^{[1
]}

Saroop, S. ^{[1
]}

Montanini, P. ^{[4
]}

Liang, Y. ^{[1
]}

Stathis, J. ^{[1
]}

Carter, R. ^{[3
]}

Pal, R. ^{[3
]}

Paruchuri, V. ^{[1
]}

Yamasaki, H. ^{[2
]}

Lee, J-H. ^{[6
]}

机构：

[1] IBM SRDC, 2070,Rt 52, Hopewell Jun, NY 12533 USA

[2] Toshiba America Electronic Components Inc, Hopewell Jct, NY 12533 USA

[3] GLOBALFOUNDRIES, Hopewell Jct, NY 12533 USA

[4] STMicroelectronic, Hopewell Jct, NY 12533 USA

[5] Infineon Technologies, Hopewell Jct, NY 12533 USA

[6] Samsung Electronics, Hopewell Jct, NY 12533 USA

来源：

2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2011年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Band-gap engineering using SiGe channels to reduce the threshold voltage (V-TH) in p-channel MOSFETs has enabled a simplified gate-first high-kappa/metal gate (HKMG) CMOS integration flow. Integrating Silicon-Germanium channels (cSiGe) on silicon wafers for SOC applications has unique challenges like the oxidation rate differential with silicon, defectivity and interface state density in the unoptimized state, and concerns with T-inv scalability. In overcoming these challenges, we show that we can leverage the superior mobility, low threshold voltage and NBTI of cSiGe channels in high-performance (HP) and low power (LP) HKMG CMOS logic MOSFETs with multiple oxides utilizing dual channels for nFET and pFET.

引用

页数：4

共 11 条

[1] Ando T., 2009, IEDM, P423
[2] Chen X., 2008, 2008 Symposium on VLSI Technology, P88, DOI 10.1109/VLSIT.2008.4588573
[3] EUGENE J, 1991, APPL PHYS LETT, V59, P78, DOI 10.1063/1.105528
[4] Strained SiGe Channels for Band-Edge PMOS Threshold Voltages With Metal Gates and High-k Dielectrics
Gilmer, David C.
Schaeffer, Jamie K.
Taylor, W. J.
Capasso, C.
Junker, Kurt
Hildreth, Jill
Tekleab, Daniel
Winstead, Brian
Samavedam, S. B.
[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2010, 57 (04) : 898 - 904
[5] Greene B, 2009, 2009 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, P140
[6] Novel High-Performance Analog Devices for Advanced Low-Power High-k Metal Gate Complementary Metal-Oxide-Semiconductor Technology
Han, Jin-Ping
Shimizu, Takashi
Pan, Li-Hong
Voelker, Moritz
Bernicot, Christophe
Arnaud, Franck
Mocuta, Anda
Stahrenberg, Knut
Azuma, Atsushi
Eller, Manfred
Yang, Guoyong
Jaeger, Daniel
Zhuang, Haoren
Miyashita, Katsura
Stein, Kenneth
Nair, Deleep
Park, Jae Hoo
Kohler, Sabrina
Hamaguchi, Masafumi
Li, Weipeng
Kim, Kisang
Chanemougame, Daniel
Kim, Nam Sung
Uchimura, Sadaharu
Tsutsui, Gen
Wiedholz, Christian
Miyake, Shinich
van Meer, Hans
Liang, Jewel
Ostermayr, Martin
Lian, Jenny
Celik, Muhsin
Donaton, Ricardo
Barla, Kathy
Na, MyungHee
Goto, Yoshiro
Sherony, Melanie
Johnson, Frank S.
Wachnik, Richard
Sudijono, John
Kaste, Ed
Sampson, Ron
Ku, Ja-Hum
Steegen, An
Neumueller, Walter
[J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2011, 50 (04)
[7] Band-engineered low PMOS VT with high-K/metal gates featured in a dual channel CMOS integration scheme
Harris, H. Rusty
Kalra, Pankaj
Majhi, Prashant
Hussain, Muhammed
Kelly, David
Oh, Jungwoo
He, Dawei
Smith, Casey
Barnett, Joel
Kirsch, Paul D.
Gebara, Gabriel
Jur, Jess
Lichtenwalner, Daniel
Lubow, Abigail
Ma, T. P.
Sung, Guangyu
Thompson, Scott
Lee, Byoung Hun
Tseng, Hsing Huang
Jammy, Raj
[J]. 2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2007, : 154 - +
[8] Jan C.H., 2009, IEEE International Electron Devices Meeting, P1
[9] Na MH, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P121, DOI 10.1109/IEDM.2002.1175793
[10] Winstead B., 2007, EDL, V28, P719

← 1 2 →