A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement

被引：70

作者：

Tai, Wei ^{[1
]}

Xu, Hongtao ^{[2
]}

Ravi, Ashoke ^{[2
]}

Lakdawala, Hasnain ^{[2
]}

Bochobza-Degani, Ofir ^{[2
]}

Carley, L. Richard ^{[1
]}

Palaskas, Yorgos ^{[2
]}

机构：

[1] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA

[2] Intel Corp, Hillsboro, OR 97124 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2012年 / 47卷 / 07期

关键词：

Class-D; CMOS PA; efficiency enhancement; OFDM; outphasing; power amplifier; power combining; power control; SOC; transformer; WLAN;

D O I：

10.1109/JSSC.2012.2191674

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A transformer-combined fully integrated outphasing class-D PA in 45 nm LP CMOS achieves 31.5 dBm peak output power at 2.4 GHz with 27% peak PAE, and supports over 86 dB of output power range. The PA employs dynamic power control (DPC) whereby sections of the PA are turned on or off dynamically according to the instantaneous signal amplitude to reduce power dissipation, especially at back-off. Dynamic on-off switching introduces transients on the power supply that can limit performance. The paper proposes and demonstrates techniques to reduce the impact of such transients. A multi-section slab inductor based transformer combiner is used to allow individual switching of unit PAs. The PA delivers 24.8 dBm average power while meeting 64-QAM WLAN requirements. PAE is 16% when using DPC, which represents a 33% efficiency enhancement compared to theDPC-disabled mode. At lower average power of 20.5 dBm, DPC enables a 140% enhancement in average efficiency, hence increasing battery life.

引用

页码：1646 / 1658

页数：13

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