Recessed junction and low energy N-junction implantation characteristics

被引：0

作者：

Lee, BC ^{[1
]}

Yoo, JR ^{[1
]}

Lee, DH ^{[1
]}

Kim, CS ^{[1
]}

Kim, SM ^{[1
]}

Choi, S ^{[1
]}

Chung, UI ^{[1
]}

Moon, JT ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Memory Div DSN, Proc Dev Team, Yongin, Gyeonggi Do, South Korea

来源：

IIT2002: ION IMPLANTATION TECHNOLOGY, PROCEEDINGS | 2003年

关键词：

low energy implantation; contact resistance; SEG; damaged silicon; TDSE (Thermal Desorption Silicon Etching);

D O I：

暂无

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

The characteristics of cell transistor with low energy junction implantation and recessed junction, which is formed by in_situ phosphorus doped selective silicon growth, are investigated. Adding the low energy n-junction implantation drastically reduces the contact resistance of pad/n-junction. And also, the drive current is improved without any degradation of BV (Breakdown Voltage) and leakage characteristics. Plasma damage free TDSE (Thermal Desorption of Silicon Etching) processing using the Cl-2 gas chemistry in UHV CVD Chamber is used to controll the junction depth. The recessed junction is formed with phosphorus-doped silicon using the SEG (Selective Epitaxial Growth) process and the characteristics of recessed junction are evaluated.

引用

页码：96 / 99

页数：4

共 22 条

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