A Multi-Channel Front-End ASIC for Pixellated Detectors

被引:2
作者
Deng, Zhi [1 ,2 ]
Liu, Yinong [2 ]
Zhang, Lan [3 ]
Li, Yulan [2 ]
Li, Yuanjing [2 ]
Li, Jin [4 ]
Lan, Allan Kejian [5 ]
Hungerford, Ed [5 ]
机构
[1] Univ Houston, Houston, TX 77004 USA
[2] Tsinghua Univ, Dept Engn Phys, Beijing 100084, Peoples R China
[3] Nuctech Ltd, Gen Res Ctr, Beijing 100084, Peoples R China
[4] Chinese Acad Sci, Inst High Energy Phys, Beijing 100049, Peoples R China
[5] Univ Houston, Dept Phys, Houston, TX 77004 USA
来源
2006 IEEE NUCLEAR SCIENCE SYMPOSIUM CONFERENCE RECORD, VOL 1-6 | 2006年
关键词
ASIC; low-noise; front-end; CZT; GEM;
D O I
10.1109/NSSMIC.2006.356170
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 16-channel front-end ASIC is designed for pixellated detectors. It consists of a charge-sensitive-preamplifier(CSA), a CR-(RC)(2) shaper and a class-AB buffer for each channel. A novel continuous reset scheme for low noise and large linear range is presented. The equivalent feedback resistance can be digitally programmed by 3 decades. The shaper output width can also be adjusted from 1 mu s to 10 mu s, allowing it to be used both for low noise and high counting rate applications. The chip is implemented in 0.6 mu m CMOS process. The ENC is measured to be 1413e+20e/pF @ 1 mu s pulse width and 1402e+11e/pF @ 10 mu s pulse width respectively. The large zero-capacitance ENC is dominant by the FETs used as resistors in the shaper. The nonlinearity is less than 1.1% over an input charge range of 0-28fC using 0.1pF feedback capacitor.
引用
收藏
页码:337 / 340
页数:4
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