A 210-284-GHz I-Q Receiver With On-Chip VCO and Divider Chain

被引：16

作者：

Alakusu, Utku ^{[1
]}

Dadash, M. Sadegh ^{[1
]}

Shopov, Stefan ^{[1
,2
]}

Chevalier, Pascal ^{[3
]}

Cathelin, Andreia ^{[3
]}

Voinigescu, Sorin P. ^{[1
]}

机构：

[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada

[2] Inphi Corp, Westlake Village, CA 91362 USA

[3] STMicroelectronics, F-38926 Crolles, France

来源：

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | 2020年 / 30卷 / 01期

基金：

加拿大自然科学与工程研究理事会;

关键词：

Receivers; Radio frequency; Bandwidth; Silicon germanium; Mixers; Gain; Voltage-controlled oscillators; 90 degrees hybrid coupler; divider; I-Q downconverter; receiver; SiGe BiCMOS; variable-gain amplifier (VGA); voltage-controlled oscillator (VCO);

D O I：

10.1109/LMWC.2019.2954036

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 240-GHz direct conversion I-Q receiver with 74-GHz RF bandwidth is reported. It features a mixer-first architecture with fundamental local oscillator (LO)-frequency Gilbert-cell downconversion mixers, variable-gain baseband amplifiers, and a 240-GHz LO source, making it the first fully integrated 240-GHz I-Q receiver. With a phase noise of -82 dBc/Hz at 1-MHz offset, the LO source has a 27-GHz tuning range and consists of a 120-GHz voltage-controlled oscillator (VCO), a frequency doubler, and a static divide-by-128 chain. The measured peak downconversion gain is 23 dB and is adjustable over 38 dB. Along with the IF bandwidth of 59 GHz, the wide RF bandwidth makes it suitable for both high data-rate communication and emerging quantum computing applications. The chip occupies an area of 1.837 mm(2) and consumes 859 mW.

引用

页码：50 / 53

页数：4

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