Alpha-particle-induced SER of embedded SRAMs affected by variations in process parameters and by the use of process options

被引:22
作者
Heijmen, T [1 ]
Kruseman, B [1 ]
机构
[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands
关键词
alpha-particles; radiation effects; soft-errors; SER; critical charges; SRAM; process variations;
D O I
10.1016/j.sse.2005.10.025
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We investigate the alpha-particle-induced soft-error rate (SER) of embedded SRAMs with a focus on the spread in SER owing to variations in the process parameters. The alpha-particle-induced SER of SRAM-instances processed in 0.18 and 0.13 mu m technologies was determined experimentally using accelerated testing. The SER in both the 0.18 and the 0.13 mu m processes show design-to-design and batch-to-batch variations. In addition, the 0.13 mu m SRAMs show a variation in SER between individual samples from the same batch. Also, circuit simulations were performed to Study the statistical variations in the critical charge of the SRAM cell. Our calculations show that the total spread in SER equals a factor of 3.0 and 4.3 for 0.18 and 0.13 mu m SRAMs, respectively. These results are in agreement with the experimental data. We show that the use of the high-V-T process option can reduce SER, because of a decrease in the collection of induced charges. Our results illustrate the importance of accurate simulation methods and stress the need to test several samples, batches, and designs in order to characterize the SER of a specific type of SRAM. (c) 2005 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1783 / 1790
页数:8
相关论文
共 11 条
[1]  
Baumann R, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P329, DOI 10.1109/IEDM.2002.1175845
[2]  
Baumann R. C., 2001, IEEE Transactions on Device and Materials Reliability, V1, P17, DOI 10.1109/7298.946456
[3]  
Dupont E, 2002, IEEE DES TEST COMPUT, V19, P56, DOI 10.1109/MDT.2002.1003798
[4]   Critical charge calculations for a bipolar SRAM array [J].
Freeman, LB .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1996, 40 (01) :119-129
[5]   Analytical semi-empirical model for SER sensitivity estimation of deep-submicron CMOS circuits [J].
Heijmen, T .
11TH IEEE INTERNATIONAL ON-LINE TESTING SYMPOSIUM, 2005, :3-8
[6]   Technology scaling of critical charges in storage circuits based on cross-coupled inverter-pairs [J].
Heijmen, T ;
Kruseman, B ;
van Veen, R ;
Meijer, M .
2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, 2004, :675-676
[7]  
HEIJMEN T, 2005, P INT C MEM TECHN DE, P77
[8]  
HSIEH CM, 1983, IEEE T ELECTRON DEV, V30, P686, DOI 10.1109/T-ED.1983.21190
[9]  
*JEDEC, 2001, JESD89
[10]   Characterization of soft errors caused by single event upsets in CMOS processes [J].
Karnik, T ;
Hazucha, P ;
Patel, J .
IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING, 2004, 1 (02) :128-143